GELBAR - sub-allocate and babysit child program.

Usage:

mme     gelbar

Where:

Q register: contains a time limit on the child's operation. This limit is expressed in units of 16 microseconds. MME GELBAR will allow the child to execute for this length of time; when the time is up, the child will be interrupted and the parent will regain control. If there is a limit on the parent's processor time, the value in the Q register must be less than this limit; if it is not, the time limit is automatically reduced to the amount of processor time left for the parent.
A register: must contain a pointer to a two-word control vector. This pointer should appear in the upper half of the register.
Word 23 (octal): contains the return address used when control is returned to the parent. If this is zero, the parent will be terminated when the child stops executing (for whatever reason).

Description:

MME GELBAR lets a parent program "babysit" a child program inside the parent's memory space. Historically for example, TSS was a large program that executed smaller time-sharing commands inside its own memory space. It used MME GELBAR to invoke these commands. (TSS has evolved beyond this approach now.) MME GELBAR should not be used in a courtesy call.

As described above, the parent uses the Q register to put a time limit on the child's execution. When this time expires, the parent will regain control. At this point, the parent may give the child more processor time and let the child continue from where it was interrupted.

The child's operation is also affected by the control vector whose address is given in the upper half of the A register. This vector has the form:

Word 1:

Upper Half: gives a base address register value for the child program (relative to address zero in the parent program).
Lower Half: points to an area of memory where the parent program has stored all its register values. These register values will be restored before control is passed back to the parent. (Thus the parent must save registers before MME GELBAR, but does not have to restore them.) The memory area used for saving registers must begin on an eight-word boundary.

Word 2:

Upper Half: gives the initial value for the instruction counter (IC) inside the child program. This is relative to the new base address register (for the child).
Lower Half: gives an Indicator register (I) value for the child program. If bit 30 of this value is on (indicating a mid-instruction interrupt), the Pointer and Length register values must contain valid values.

When MME GELBAR is called, it will begin by storing the contents of the Q register in the parent's word 21 (octal) and the new BAR in the parent's word 31 (octal). Bits 19 and 30-35 of word 31 are set to zero.

The timer register value that will be used by the child is stored in the parent's word 22 (octal). This will be the value that the parent gave in the Q register, unless the given value was more than the parent was allowed to specify.

If a fault or interrupt occurs while the child is executing, GCOS will service the fault/interrupt through the usual exception handling process, then return control to the parent. The parent also regains control if the timer runs out on the child or if the child returns (terminates its own execution).

Before returning to the parent program, GCOS stores the child's IC and I values in the parent's word 22 (octal) and subtracts the processor time that the child used from the value in word 21 (octal). Due to timing inaccuracies, the time value in word 21 may end up negative.

If the child stopped because of a fault or a time-out, bit 19 in word 31 (octal) is set to 1 and bits 30-35 are set to indicate the type of fault.

If the child was executing a multi-word instruction at the time it was interrupted (by fault, interrupt, or time-out), bit 30 of the indicator register will be on. (This is the mid-instruction interrupt bit.) The parent must zero this bit before performing any multi-word instructions of its own. The parent must also save Pointer and Length registers before another interrupt can occur with the mid-instruction interrupt bit set to zero.

If the parent uses another MME GELBAR to resume the child program in the middle of a multi-word instruction, the parent must reload the Pointer and Length registers with the saved values and must inhibit all instructions between the LPL and the MME GELBAR.